From Post-Silicon to Predictive: Smarter In-System Testing for Reliable, Future-Proof SoCs

As modern System-on-Chips (SoCs) power everything from AI applications to autonomous vehicles and cloud-scale infrastructure, ensuring reliability throughout their lifecycle has become mission-critical. Traditional test methods, limited to manufacturing or early bring-up, miss real-world issues that arise under dynamic workloads and environmental stress.

This session introduces In-System Test (IST) a runtime approach that executes structural tests directly in deployed silicon without disrupting normal operation. Attendees will learn how advanced techniques such as ATPG and MBIST can be seamlessly integrated into live systems, and how a decoupled test access framework enables flexible test delivery and chip health monitoring.

Looking forward, the talk explores the emerging frontier of Predictive IST where real-time test data and failure analytics transform IST from a reactive fault-detection mechanism into a proactive reliability engine. By forecasting silicon degradation and predicting failures before they occur, Predictive IST unlocks new possibilities in predictive maintenance for safety-critical and high-availability systems.

Key takeaways:

Architectural principles for runtime IST deployment in SoCs

Practical challenges and solutions for field integration

Using IST data for predictive reliability and lifecycle modeling

Strategies for optimizing test scheduling, coverage, and performance

This session is tailored for SoC architects, DFT engineers, and reliability professionals seeking to extend silicon lifespan, reduce downtime, and build smarter, more resilient systems.